Rewriting AltiVec Instructions
Most of the tasks required to vectorize for AltiVec—restructuring data structures, designing parallel algorithms, eliminating branches, and so forth— are the same as those you’d need to perform for the Intel architecture. If you already have AltiVec code, you’ve already completed the fundamental vectorization work needed to rewrite your application for the Intel architecture. In many cases the translation process will be smooth, involving direct or nearly direct substitution of AltiVec intrinsics with Intel equivalents.
The MMX, SSE, SSE2, and SSE3 extensions provide analogous functionality to AltiVec. Like the AltiVec unit, these extensions are fixed-sized SIMD (Single Instruction Multiple Data) vector units, capable of a high degree of parallelism. Just as for AltiVec, code that is written to use the Intel ISA typically performs many times faster than scalar code.
Before you start rewriting AltiVec instructions for the Intel instruction set architecture, read AltiVec/SSE Migration Guide. It outlines the key differences between architectures in terms of vector-based programming, gives an overview of the SIMD extensions on x86, lists what you need to do to build your code, and provides an in-depth discussion on alignment and other relevant issues.